How to connect a parallel ATA hard disk to a microcontroller

Index

• 0> Preface
• 1> Considerations
• 2> Hardware
  • The power connector
  • The ATA connector
  • The Signal names with short description
• 3> The HDD registers
• 4> HDD protocol, reset and practical interfering
  • Reading and writing registers
  • Issuing read/write commands
  • The HDD reset
• 5> Schematic/Source of the PIC16F628 serial ATA hard disk interface
• 6> Information on the PIC16F628 serial ATA hard disk interface
  • Commands and protocol of software revision 7.2
  • Changes from software revision 7.2 to 7.3
  • Notes on contructing the board
  • Which HDDs I used for testing
  • Pictures of the interface
• 7> Additional documentation (or: where I got all this from)
• 8> FAQ

0> Preface

In this document I will describe how to connect a parallel ATA harddisk (further on simply called HDD by me) to a 8Bit microcontroller (MCU). 8Bit, because I use these ones myself. Of course it should be possible with a 16Bit or any other MCU, with a 16Bit one it might be even simpler.
But before you think: "Wow, I need to build that, because thatīs what Iīve been ever looking for!", read the Considerations.

1> Considerations

A HDD connected to a MCU is useful where you have to log or compute large amounts of data. But for something up to 4M or more, a FLASH device may be better suited. Keep in mind that a HDD, because of its mechanical components, is shock sensitive, so donīt mount it on your mountian bike. You may find it interesting, that Compact Flash (CF) Cards can be used like HDDs. So you may use them in this case. A HDD also needs a lot more power than a single FLASH chip and needs +5V and +12V (except some notebook types and the CF-Cards). This is what it makes them absolutely unsuited for battery-powered devices. What you have to expect in puncto data rates: First, the data rate mainly depends on the speed of your MCU. 0.5kB/s to 3kB/s should be possible without big troubles. If you need some MB/s, you need a horrendous fast MCU and you may have to use DMA and/or interrupts what complicates it. Another drawback is, that a HDD can only read and write blocks of 512B. If you have a really tiny one (like the one I used for the serial interface) you donīt have the RAM to prepare a block for reading/writing.
If you still think a HDD is the right thing for your MCU application, read on.

2> Hardware

The power connector

I think everyone knows the standard power connector.

 Drive side (with commonly used cable colors on power cable)
  _______
 /       \
| o o o o |
'---------'
  | | | |
  | | | '- 12VDC
  | | '--- 12V return (12V GND)
  | '----- 5V return (5V GND)
  '------- 5VDC

The ATA connector

I will only explain the 40-Pin connector (the standard includes more), because it is the most spreaded one. But it shouldnīt matter since only the pin position is different.

   .-----------------------------------------.
39 | . . . . . . . . . . . . . . . . . . . . | 1
40 | . . . . . . . . . . . . . . . . . . . . | 2
   '-----------------------------------------'

The Signal names with short description

A slash ("/") before a signal name indicates, that the signal is inverted.

Signal names
Pin #	Host Device	Name	Description
1	-->	/RESET	This signal from the host system shall be asserted beginning with the application of power and held asserted until at least 25 us after voltage levels have stabilized within tolerance during power on and negated thereafter unless some event requires that the device(s) be reset following power on.
2	-	GND
3	<-->	DD7	Data signal
4	<-->	DD8	Data signal
5	<-->	DD6	Data signal
6	<-->	DD9	Data signal
7	<-->	DD5	Data signal
8	<-->	DD10	Data signal
9	<-->	DD4	Data signal
10	<-->	DD11	Data signal
11	<-->	DD3	Data signal
12	<-->	DD12	Data signal
13	<-->	DD2	Data signal
14	<-->	DD13	Data signal
15	<-->	DD1	Data signal
16	<-->	DD14	Data signal
17	<-->	DD0	Data signal
18	<-->	DD15	Data signal
19	-	GND
20	-	(keypin)
21	<--	DMARQ	Used for DMA data transfers between host and device.
22	-	GND
23	-->	/DIOW	Write strobe signal from host. rising edge latches the data on DD0-DD15 into the device.
24	-	GND
25	-->	/DIOR	Read strobe signal from host. Falling edge enables the data from the device on DD0-DD15
26	-	GND
27	<--	IORDY	The use of IORDY is required for PIO modes 3 and above and otherwise optional.
28		CSEL	Used for automatic detection of device0 / device1
29	-->	/DMACK	This signal shall be used by the host in response to DMARQ to initiate DMA transfers.
30	-	GND
31	<--	INTRQ	This signal is used to interrupt the host system.
32	-	reserved
33	-->	DA1	For register selection
34		/PDIAG	The host shall not connect to the PDIAG- signal.
35	-->	DA0	For register selection
36	-->	DA2	For register selection
37	-->	/CS0	For register selection
38	-->	/CS1	For register selection
39		/DASP	Indicates that a device is active, or that device 1 is present. Most of the time a LED is connected to it.
40	-	/GND

Of course, you donīt need all them for basic interfaceing. The ones I used are:
DA0, DA1, DA2, /CS0, /CS1, DD0-DD15, /RESET, /DIOR, /DIOW, /DASP
Where I put the following ones on GND:
GND, CSEL
For /CSEL you donīt need a I/O Pin of you MCU, because only the HDD-busy-LED is connected to it. You know that from your PC. Use a 1k pullup and a LED in the following way:

                         ^ +Ub
/DASP                    |
  o----|<|---\/\/\/\-----'
       LED     1k

3>The HDD registers

The HDD is used like as a set of registers. The bidirectional data bus is DD0-DD15 and the address selection is done by DA0-DA2, /CS0 and /CS1. Many of them have a bitwise meaning.

HDD registers
Addresses					Functions
/CS0	/CS1	DA2	DA1	DA0	Read (/DIOR)	Write (/DIOW)
N	N	x	x	x	Data bus high impendance	Not used
N	A	0	x	x	Data bus high impendance	Not used
N	A	1	0	x	Data bus high impendance	Not used
N	A	1	1	0	Alternate Status	Device control
N	A	1	1	1	Obsolete	Not used
A	N	0	0	0	Data	Data
A	N	0	0	1	Error	Features
A	N	0	1	0	Sector count	Sector count
A	N	0	1	1	Sector number LBA 0-7	Sector number LBA 0-7
A	N	1	0	0	Cylinder low LBA 8-15	Cylinder low LBA 8-15
A	N	1	0	1	Cylinder high LBA 16-23	Cylinder high LBA 16-23
A	N	1	1	0	Device/Head LBA 24-27	Device/Head LBA 24-27
A	N	1	1	1	Status	Command
A	A	x	x	x	Invalid address	Invalid address

A = signal asserted, N = signal negated, x = donīt care
Asserted means: Signal high, if it is a normal signal; Signal low, if it is a inverted signal
Negated means: Signal low, if it is a normal signal; Signal high, if it is a inverted signal

Alternate status register

Command register

Cylinder high register

Cylinder low register

Data register

Device control register

Device/Head register

Error register

Features register

Sector count register

Sector number register

Status register

4>HDD protocol, reset and practical interfaceing

Reading and writing registers

To write a register do the following:

1. Set the address by setting /CS0, /CS1, DA0-DA2
2. Enable the outputs if you have a tristate output in your MCU or interface. (To put the data on the bus. You should already have loaded the data latch before enabling the tristate output.) Keep the data on the bus till after point 4.
3. Put /DIOW low
4. Put /DIOW high
5. Disable the tristate outputs. (I think that doesnīt have to be done, but I do it to be on the safe side.)

1. Set the address by setting /CS0, /CS1, DA0-DA2
2. Make sure, that the MCU/interface inputs/outputs are in high impendace mode.
3. Put /DIOR low
4. Read the data bus
5. Put /DIOR high

Issuing read/write commands

I will describe here how *I* did the interfaceing. This does not mean that it sticks absolutely to the standard, but it works (at least for me). I only use the READ SECTOR(S) with retries and the WRITE SECTOR(S) with retries commands. (Command code: 0x20 and 0x30).

To read a sector from the hdd do the following, assuming that interrupts are turned off:

1. Wait till the BSY bit is low
2. Set the DEV bit in the Device/Head register to 0 or 1, depending on which device you want to access.
3. Wait till the BSY bit is low
4. Load the Device/Head, Cylinder low, Cylinder high, Sector number and Sector count register.
5. Issue the read or write command.
6. Wait till the BSY bit is low
7. Wait till the DRQ bit is high
8. Transfer one data block (256 reads/writes from/to the Data register = 512B)
9. Check the Status register, if an error occured
10. If you selected to transfer more than 1 block, proceed with 6.

The HDD reset

I descibe only the hardware reset and only for a one-device-configuration, since Iīve never used software reset or two devices. To do the reset, you have to pull the /RESET wire low and keep it low for at least 25us. Then reset it to high. After that you should poll the Status register and wait till the the BSY bit is low and the DRDY is high. Thatīs all.

5> Schematic/Source of the PIC16F628 serial ATA hard disk interface

All MCU firmware downloadable here is for a MCU clock frequence of 20MHz even if the schematic says 4MHz

The assembler source for Microchips MPLAB can be downloaded here:
V7.2 (for board Rev. 0.35): serhdd72.asm (Baud rate: 57600)
V7.3 (for board Rev. 0.35): serhdd73.asm (Baud rate: adjustable)

There is also a INTEL-Hex-file available here:
V7.2 (for board Rev. 0.35): serhdd72.hex (Baud rate: 57600)
V7.3 (for board Rev. 0.35): serhdd73.hex (Baud rate: adjustable)

A GIF of the schematic is available here:
Rev. 0.35: rev0_35.gif

A high resolution (360dpi) GIF of both sides of the board is available here:
Rev. 0.35: rev0_35_toplayer.gif, rev0_35_bottomlayer.gif
You have to resize them to 100mm x 80mm.

A face plan is available here:
Rev. 0.35: rev0_35_faceplan.gif

The source of the Linux program I used to the test whole thing can be downloaded here: hdd3.c [view online]
Note: The program is fairly incomplete. In fact these are more code fragments than a really usable program, but you can use it for testing and experimenting. It only works with firmware Rev. 7.3.

6> Information on the PIC16F628 serial ATA hard disk interface

As the name says, the modules is intended to be an interface. If you build it, you still need another MCU or a PC which is controlling it. It is absolutely useless otherwise. The module uses only Device 0 (Master) for the HRDCHS, HWRCHS, HRDLBA, HWRLBA and HIDENT commands.

Commands and protocol of software revision 7.2

• HNOP
  If the interface receives this command, it sends the HNOP code back if it is idle.

• HWBSY
  Waits till the HDD is ready, then sends a RDY.
  (The modules checks the HDD status by polling the BSY bit in the Status register.)

• HWDRQ
  Waits till the HDD is ready for data transfer, then sends a RDY.
  (The modules checks the HDD status by polling the DRQ bit in the Status register.)

• HRESET
  Does a HDD hardware reset by putting the /RESET wire more than 25us low.

• HRDREG
  When the command is issued, the interface sends RDY immediately. After that, it waits for the register address byte. This byte is put on the address signals the following way:
  

  
   Bit 7         Bit 0
   |             |
   V             V
   _______________
  | | | | | | | | |
   ---------------
         DA2     /CS0
           DA1 /CS1
             DA0
  

  After this byte, the interface reads the register content and sends it.

• HWRREG
  When the command is issued, the interface sends RDY immediately. After that, it waits for the register address byte. This byte is put on the address signals the following way:
  

  
   Bit 7         Bit 0
   |             |
   V             V
   _______________
  | | | | | | | | |
   ---------------
         DA2     /CS0
           DA1 /CS1
             DA0
  

  After this byte, the interface waits for the register contents to write. If it has received the register content, it writes the HDD register.

• HIDENT
  Waits till the HDD is ready, then issues a IDENTIFY DEVICE command. After that, it reads the HDDs data buffer and transfers the 512B over the serial link. 2 Bytes checksum follow the data block.

• HRDDATA
  Reads the HDDs data buffer and transfers the 512B over the serial link. 2 Bytes of checksum follow the data block.

• HWRDATA
  Immediately after receiving this command the interface sends a RDY. After reads 512B of data from the serial link (the data block) which is written to the HDDs buffer. *After* writing the whole block to the HDDs buffer the checksums are checked. If the checksums are OK, a RDY is sent, otherwise a CSUMERR is sent.

• HRDCHS
  This command reads a HDD block at a given CHS address. *After* the HDD is ready, a RDY is sent. then if wants to receive the CYL HIGHBYTE, CYL LOWBYTE, HEAD, SECTOR NUMBER and SECTOR COUNT in this order. if SECTOR COUNT is 0, 256 blocks are read.
  For each block it does the follwing:
  • Read the block and transfer it
  • Transfer the 2 Bytes checksum
  • Send a RDY if successful or ERR if an error occured

• HWRCHS
  This command writes a HDD block at a given CHS address. *After* the HDD is ready, a RDY is sent. then if wants to receive the CYL HIGHBYTE, CYL LOWBYTE, HEAD, SECTOR NUMBER and SECTOR COUNT in this order. if SECTOR COUNT is 0, 256 blocks are written.
  For each block it does the follwing:
  • Receive a block and write it
  • Read the 2 Bytes checksum
  • If the checksum is OK send a RDY, otherwise send CSUMERR
  • Send a RDY if the HDD command was successful or ERR if an HDD error occured (not checksum error!).

• HRDLBA and HWRCHS
  Exactly the same as HRDCHS and HWRCHS. The only difference is that the 5 Bytes are not CYL HIGHBYTE, CYL LOWBYTE, HEAD, SECTOR NUMBER and SECTOR COUNT. These are: LBA 27-24, LBA 23-16, LBA 15-8, LBA 0-8 and SECTOR COUNT.

Changes from software revision 7.2 to 7.3

A small HDD protocol bugfix and a new command to allow the host software to adjust the baudrate. After reset (power on or reset button) the module starts with a baudrate of 9600.

• HSETBRT
  Hex command code 0x0D
  After issuing this command, the interface sends a RDY. Then it waits for the reception of the new byte for the MCUīs SPBRG register.

  Baudrates
  Hex code	Baud rate
  0x81	9600
  0x40	19200
  0x20	38400
  0x15	57600
  0x0A	115200

  Note that any value between 0 and 255 is valid. Any byte, valid or invalid, is blindly accepted but may result in a non standard baudrate. The baudrate can be calculated by: 20E6/(16*(x+1)) where x is the value of SPBRG. Note that the x-value canīt have any fractional digits. It must be an integer of course.

Notes on contructing the board

For the capacitators you should use the following ones:

Capacitator types
Cap. number	Type
C1, C2, C10, C11, C13, C12, C14	Ceramic, 16V or higher
C20, C21, C22, C23, C19	Tantal, 16V or higher
C8, C9, C3, C4, C5, C6, C7	Elko, 16V or higher

If you use a selfmade PCB board, the holes are not through-contacted so you have to solder the top and the bottom layer seperately. To avoid problems you should solder it in the following order:

1. Solder C10, C11, C12, C13, C14
2. Solder IC1, IC4, IC2, IC3, IC5, IC10, IC9
3. Solder X4, X1, X2, X3, X5, C8, C9, C4, C5, C6, C7, C3, Q1, C1, C2
4. Solder C20, C21, C22, C23, X6, C19, R1, LED1, R8, R11, R12, R2, R7, D1, S2, IC7, IC8
5. Solder R3, R4, R5, R6. YOu shouldnīt solder LED2, LED3, LED4 and LED5 as in the current firmware version of the board, the usage of these LEDs is not implemented. They would be on all the time.

1. Set your power supply to a current limit of about 20mA-30mA (if you have one).
2. Connect the power.
3. Check VCC on all ICs.
4. Disconnect the power.
5. Put IC4 in. Check for ~+10V on pin 2 and ~-10V on pin 6.
6. Disconnect the power.
7. Put the other ICs in.
8. Set your power supply to a current limit of about 150mA.
9. Connect the power. The circruit should drain about 75mA-120mA, if you use LS-TTL ICs. I donīt know what it drains if you use HCT ICs, because Iīve only used LSTLL yet.

Which HDDs I used for testing

• Conner Peripherials CP30174AE (170MB)
• Seagate ST3243A (214MB; Switches the the spindle off and on again on reset, what takes its time. Very annoying. This seemed to be a very slow drive so it was perfect for testing.)
• Quantum ProDrive LPS (420MB; The only one with LBA support)

Pictures of the interface

You can view them here

7> Additional documentation (or: where I got all this from)

The main resource was the ATA3 standard draft revision 3. It can be found here:
d2008r7b.pdf

I also used this text file a bit for orientation:
ide.txt

Thatīs all. You shouldnīt need more for what Iīve done.

8> FAQ

Q: What about CDROM drives?
A: I donīt think that a CDROM drive is really needed for a MCU application. Most drives use ATAPI commands. You would have to implement them (firmware + host software) but the interface itself might be the same.

Q: What about CD-Writers?
A: Youīd have to be very good to prevent a buffer underrun. Read "What about CDROM drives?".

Q: What about Floppy drives?
A: At the beginning of this project (the planning in my head) I wanted to make a floppy disk drive, because of the removable media. But floppies are *very* stupid drives. To write to any magntical storage media you need to modulate the data. This modulation has to be done *external* for floppy drives. You canīt transfer the data directly like with the HDD. This makes is very complicated unless you use a floppy disk controller IC which are not easy to get and SMD most of the time.

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Copyright (C) 2003 by Wiesner Thomas

Last change: November 11th 2006